The present invention relates generally to amplifiers, and more specifically to amplifiers with adjustable offsets.
Amplifiers are used for many purposes. Amplifiers receive input signals, amplify them, and produce output signals with a larger amplitude. Some amplifiers suffer from an xe2x80x9cinput referred offset.xe2x80x9d An amplifier with an input referred offset produces a non-zero output signal when a zero input signal is received. This can be a problem, in part because amplifiers with very high gain can produce large output signals with a zero input signal.
Prior art systems have reduced input referred offset in various ways. One typical mechanism to reduce input referred offset includes the use of circuit layout techniques to match the performance of source-coupled transistors in differential amplifiers. See, for example, section 24.1.4 of R. Jacob Baker et. al, xe2x80x9cCMOS Circuit Design, Layout, and Simulation,xe2x80x9d IEEE Press, 1998. Known circuit layout techniques, such as those discussed in the Baker reference, can reduce input referred offset, but fall short of eliminating it completely.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for methods and apparatus to further reduce input referred offsets in amplifiers.